Fiche de cours

Computer architecture II

CS-209

Fiche de cours

Enseignant(s) :

Ienne Paolo

Langue:

English

Summary

The course completes the introduction to computer architecture.

Content

• Inputs/Outputs and Interrupts
• Exceptions
• Computer Performance
• Pipelining
• Dynamic Scheduling
• Superscalar and VLIW Processors
• Multiprocessors and Cache Coherence

Keywords

Computer Architecture, Processor, CPU, ILP, Multiprocessors, Coherence

Learning Prerequisites

Required courses

• CS-173 (Digital System Design)
• CS-208 (Computer Architecture I)

Learning Outcomes

By the end of the course, the student must be able to:

• Design a simple exception handler in assembler
• Design pipelined digital circuits at Register Transfer Level
• Optimize the performance of a processor pipeline by reordering instructions
• Explain possible solutions to the cache coherence problem

Teaching methods

Ex-cathedra courses and labs on an FPGA board.

Assessment methods

• Lab I (13%)
• Pipeline simulation (4%)
• Lab II (13%)
• Final exam (70%)

Supervision

Office hours	No
Assistant.e.s	Yes
Forum	Yes

Resources

Virtual desktop infrastructure (VDI)

No

Bibliography

David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Morgan Kauffman, 5th edition, 2013.

Ressources en bibliothèque

• Computer organization and design

Moodle Link

• https://moodle.epfl.ch/course/view.php?id=14153

Prerequisite for

• CS-470 (Advanced Computer Architecture)